CST 334 - Module 4

 Week 4

This week of learning about memory virtualization, included material on how paging works with the process and physical memory. Paging splits up address space info fixed sized units called pages (different from segmentation which is variable size and contiguous). The same also happens with physical memory and is known as a page frame. To keep track of these pages of addresses, we use a data structure called a page table which is used to map virtual addresses to physical addresses by storing mappings of virtual page numbers (VPN) to physical frame numbers (PFN) along with bits indicating whether it is valid and other protection bits (readable, writeable, executable). The PFN in combination with the valid and protection bits is known as a page table entry (PTE). 

Leaving out other bits of information to keep this brief, given a virtual address, we can find the VPN from the virtual address (VPN + VA-OFFSET = Virtual Address). Using the page table, use the VPN to find the PTE, check to see if it is valid, readable, etc. And if it is valid, we can also find the PFN from the PTE (Valid/Protection bits + PFN = PTE). The add the offset from the virtual address to the PFN to get the physical address (PFN + VA-OFFSET = Physical Address). This reduces fragmentation, but the page table can be large in size and slow things down.

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